1. Field of the Invention
The present invention generally relates to data communication and, more particularly, to sampling data in communication receivers.
2. Related Art
Multiphase clocks having the same frequency but different phase offsets are widely used in high speed data applications such as high speed serial-deserializers and high speed analog digital converters. Use of the multiphase clocks allows for high speed operation without the need for a high speed clock by running the multiphase clocks at a lower frequency.
However, performance of multiphase operation is limited by the accuracy of the phase spacing of the multiphase clocks. In practice, clocks may be generated from crystals and oscillator circuits. Manufacturing tolerances of the crystals and oscillator circuits may cause small deviations in the frequency characteristics of the generated clocks from their nominal values. In addition, operating conditions such as fluctuations in voltage and temperature may induce further variance in the clock characteristics. As such, phase offsets of multiphase clocks may not have equal phase spacing. Accordingly, there is a need for an improved approach to the operation of multiphase clocks to address such inaccuracies.